This invention relates to an output circuit employing insulated-gate field-effect transistors, and more particularly to an output circuit fabricated in a form of a semiconductor integrated circuit.
Recently, a demand has arisen for integrating more semiconductor devices on a semiconductor chip having a limited area to fabricate a large scale integrated circuit (LSI) employing insulated-gate field-effect transistors (hereinafter referred to as IGFETs) such as MOS(metal-oxide-semiconductor) transistors. Attempts have thus been made to shorten the lengths of the channels of IGFETs on the chip, thereby increasing their effective integrating density and offering an IGFET configuration that makes most use of the physical properties of the semiconductor.
In general, as the channel length of an IGFET decreases, the breakdown voltage across drain and source drops appreciably. Therefore, efficient use of the characteristics of an IGFET become impossible with a power voltage of 12 volts which is most commonly employed to operate an integrated circuit composed of IGFETs. As a result, the integrated circuit must be modified to operate by a lower supply voltage. In addition, an integrated circuit of this type requires an input/output level compatibility with TTL and is invariably supplied from a 5-volt power supply. This increases the complexity of the power supply as well as the use of a -5 volt supply for biasing the semiconductor substrate. Namely, the circuit requires 12-volt, +5 volt and -5 volt power supplies. To reduce the number of power supplies used would render the design of an integrated circuit (such as a memory) far simpler than is realized today. To be more specific, a conventional integrated circuit requiring three power supplies uses an output circuit that operates with 5 volts, for ensuring the TTL level compatibility. Accordingly, an elimination of this 5-volt supply is expected to reduce appreciably the complexity in the designing of an integrated circuit. However, an elimination of the power source only for the output circuit that assures the TTL level compatibility inevitably requires the use of another power supply other than the 5-volt power supply for the output circuit. Such other power supply may possibly fail to assure a maximum voltage (usually less than 5.5 volts) at a high logical level of the output circuit.
Therefore, one object of this invention is to provide an output circuit with a decreased number of power supplies in which the complexity in the power system is reduced.
Another object of this invention is to provide an output circuit which assures a logical high output level not to exceed the maximum level of the TTL logical high level.
According to the present invention, there is provided an output circuit comprising a series circuit responsive to at least one input signal for producing an output signal, the series circuit including first and second field-effect transistors connected in series between first and second nodes, a first power source, a third field-effect transistor coupled between the first node and the first power source, and control means responsive to the output signal for controlling the third transistor to limit the high level of the output signal in the absolute value.
The control means may be composed of a fourth field-effect transistor coupled between the first power source and the gate of the third transistor and a fifth transistor having a drain coupled to the gate of the third transistor, a source supplied with a second power source and a gate supplied with the output signal.
Such an output circuit may be so modified that it includes a sixth transistor having a drain connected to the source of the fifth transistor to which the voltage variation in the output signal is fed back, which controls the conductance of the third transistor, the gate driven by a timing signal, and the source supplied with the second power source. By means of such modification, a deviation in the output signal is fed back to the gate of the fifth transistor to increase the voltage at the gate of the fifth transistor for clamping at the output signal.
Another modification of the output circuit is such that it includes a sixth transistor having its drain connected to the source of the fifth transistor back. The gate is connected to the drain of the fifth transistor, and to the source supplied with the second power source.
According to still another modification, the output circuit further includes a sixth transistor having a drain and a gate commonly connected to the source of the fifth transistor and a source supplied with the second power source, wherein the voltage at the gate of the fifth transistor can be increased.